• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    PURPOSE: A method for transitting statuses of a network synchronization device is provided to cope with time changes by outputting status information of clocks, outputted every predetermined time in an internal clock unit of the network synchronization device, to a network synchronization device controller, so that an operator can freely control status transitions by specifying the statuses of the internal clock unit to output the specified statuses. CONSTITUTION: An internal clock unit of a network synchronization device performs transitions for a normal status, a functional blocking status, an operator blocking status, and a stand-by status. A network synchronization device controller controls an internal clock unit. A method for transiting statuses of an internal clock unit in the network synchronization device controller, comprises the steps of: if a functional failure is generated of if a board is ruptured in the normal status, transiting to the functional blocking status; transiting to the operator blocking status by an operator command in the normal status; transiting to the operator blocking status by the operator command in the functional blocking status; if the operator command is received in the operator blocking status, analyzing the received operator command, and if the command is for transmitting to the stand-by status, transiting to the stand-by status, and if the command is for transiting to the normal status, transmitting to the normal status; and if the operator command transiting the stand-by status to the normal status is received, transiting to the normal status.
    公开号:KR20000044399A
    申请号:KR1019980060896
    申请日:1998-12-30
    公开日:2000-07-15
    发明作者:이승현
    申请人:윤종용；삼성전자 주식회사；
    IPC主号:
    专利说明:

    Management Device and State Transition Method of Network Synchronizer in Switching System
    The present invention relates to a network synchronizer device and a method of managing the network synchronizer device for generating a system clock of the switching system, and more particularly, to a management device of the network synchronizer device of the switching system and a state transition method of the network synchronizer device.
    In general, since the exchange system is synchronized between the exchange systems to transmit and receive data, the exchange system operates by synchronizing within the system. Thus, the synchronization device has a synchronism device to achieve synchronization. The block configuration of such a network synchronizer is described with reference to FIG. 1 as follows.
    1 is a block diagram of a connection between the network device and the operator used in the TDX-100 switching system.
    Inside the synchronizer device 10, there are redundant external clock parts 11a and 11b which receive clocks from other switching systems via the E1 line and divide them into clocks of 4KHz, and clocks of 4KHz from the external clock part of the operation mode. And a second internal clock part 12a, 12b and a second internal clock part 13a, 13b for receiving the signal and converting the signal into a clock used in the switching system. Such a configuration is an internal configuration of the TDX-100, and a device for supplying a clock to another type of exchange system or a remote subscriber board of the TDX-100 has one redundant internal clock unit. That is, the other internal switching system or the remote subscriber board of the TDX-100 does not include redundant second internal clock parts 13a and 13b.
    In addition, the redundant first internal clock unit 12a and 12b and the dual synchronizer device control unit 20 for controlling the dual second internal clock unit 13a and 13b collect state information of each internal clock unit and output them to the operator. Converts and outputs a message to be outputted, and simultaneously selects an operation mode among the redundant first internal clock units 12a and 12b or the second internal clock units 13a and 13b according to an operator's request or a command of a system controller. Among the internal clock units selected as the operation mode, only one internal clock unit is selected as the operation mode. Therefore, the network synchronizer device control unit 20 is connected to the maintenance control unit 30. The maintenance control unit 30 is connected to various processors of the exchange system to perform control regarding maintenance. In addition, the maintenance control unit 30 is connected to the operator computer 40 and outputs an alarm or event generated in various processors to the operator computer 40, and performs the instructions received from the operator computer 40, The result is output back to the operator computer 40. The operator computer 40 receives the data output from the maintenance control unit 30 and displays the graphic and text, and converts the command input by the operator into data that can be processed by the maintenance control unit 30 of the exchange system. .
    The internal clock units having the configuration as shown in FIG. 1 are divided into three states. This will be described with reference to FIG. 2. 2 is a state transition diagram of an internal clock unit of the network synchronizer device. The normal state 100 refers to a state in which the internal clock unit performs a normal operation and is not related to the operation mode or the standby mode. In other words, the internal clock unit outputs a clock within a threshold required by the system and does not have a physical or functional error by an operator. The function blocking state 110 is a state in which an internal clock unit has a function failure in hardware, a reset state, a board is removed, or a board is detached and remounted. Here, the malfunction state refers to a state in which a clock within a threshold required by the switching system cannot be output. In the operator blocking state 120, the operator inputs a blocking command to the operator computer 40 to receive a blocking command through the maintenance controller 30 to the manipulator device control unit 20 to block the internal clock unit. Say. In FIG. 2, such a state transition is classified into a hardware state transition and a state transition by an operator command. The hardware state transition is shown by the dotted line, and the state transition by the operator command is shown by the solid line.
    When blocked by the operator in the state of the internal clock unit may be returned to the normal state at any time by the operator's command. In addition, it is preferable that the board is detached from the board as shown in the function blocking state 110 or a function blocking state occurs when a function failure occurs. However, in the case of mounting and mounting, even though the malfunction has been resolved, the clock has a minimum return time to return to the normal state 100 after synchronizing the clock by hardware and releasing the clock alarm itself. This time can be set differently at system design time, but at least 10 minutes is required. Therefore, the administrator who manages the system has a problem that it is difficult to determine the correct state such as whether the internal clock unit is in a hermetic state, a reset state, or returning to a normal state in the function blocking state 110. As described above, the system is tested in a state in which the accurate state of the network synchronizer is not known, or when a system error occurs, the system cannot be corrected, and in the worst case, the system may be down.
    Accordingly, an object of the present invention is to provide a management device for identifying the exact state of an internal clock unit of a network synchronizer in a switching system and a state transition method of the internal clock unit of the network synchronizer.
    1 is a block diagram of a connection between the network device and the operator used in the TDX-100 exchange system,
    2 is a state transition diagram of an internal clock unit of a network synchronizer device according to the prior art,
    3 is a state transition diagram of an internal clock unit of the network synchronizer device according to the present invention;
    The state transition management apparatus of the network synchronizer device of the switching system according to the present invention for achieving the above object, the external clock unit for receiving the clock output from the outside and divides into a predetermined clock and outputs to the internal clock unit of the switching system. And a steady state for receiving the output of the external clock unit and outputting the clock as required by the switching system, outputting a value within a threshold of the clock required by the switching system, and a threshold of the clock required by the switching system. Outputs the clock, which performs all functions by outputting a function blocking state indicating a state that fails to output the value within the system, or is disengaged from the system, a malfunction, or a reset, and a value within the threshold of the clock required by the switching system. This inhibited readiness and clock output by operator command At least one redundant internal clock unit having four states of the forbidden operator blocking state, controlling the operation of the internal clock unit, and receiving state information on a clock output of the internal clock unit at a predetermined time unit; A manipulator device control unit, a maintenance control unit performing an interface of commands and data transmitted and received between an operator computer and the manipulator device control unit, and converting and outputting commands inputted from an operator into commands that can be processed in the switching system, and It consists of an operator computer that displays the messages output from the maintenance control unit in numbers or letters.
    The transition from the ready state to the normal state is performed by an operator command or by releasing a clock alarm by itself, and the transition from the ready state to the operator blocking state is made by an operator command. Transition to the function blocking state when a malfunction occurs in the normal state, and transition to the ready state when the function failure is eliminated in the function blocking state or outputs a clock within the threshold required by the switching system, the operator in the function blocking state Transition to the operator blocking state by an instruction, and transition to the ready state by an operator instruction from the operator blocking state.
    The state transition management method of the internal clock unit in the network synchronizer device control unit for controlling the internal clock unit according to the present invention for achieving the above object, a network capable of transition to the normal state, the functional blocking state, the operator blocking state, the ready state It has an internal clock part of the synchronous device, and in case of a malfunction or reset in the normal state, when the board is dismounted, the process of shifting to the function blocking state by itself and the operator blocking by the operator command to transition to the operator blocking state in the normal state Transitioning to the operator blocking state by a process of transition to a state, an operator command to transition from the function blocking state to the operator blocking state, and an operator command received when the operator command is received in the operator blocking state To transition to the ready state In the case of a transition to the ready state and a command to transition to the normal state, the process transitions to the normal state, and when an operator command is received to transition to the normal state from the ready state, the transition to the normal state, and the function blocking Transition to the ready state when the malfunction is cleared without the operator command or outputs the clock within the threshold value required by the switching system, and the clock alarm is automatically released from the ready state to the normal state. Characterized in that the process is made.
    Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. The same parts also use the same reference numerals, although shown in the other figures.
    3 is a state transition diagram of an internal clock unit of the network synchronizer device according to the present invention. First, in the present invention, the redundant first internal clock parts 11a and 11b and the duplicated second internal clock parts 13a and 13b update the state information of the clock output at predetermined time intervals so that the network synchronizer device controller 20 To print). In addition, the portion indicated by the dotted line in the process of FIG. 3 is a process of hardware flow, and the portion indicated by the solid line is a process in which the state is changed by an operator's command.
    The steady state 100 refers to a state in which the internal clock unit supplies a clock within a threshold required by the switching system. The function blocking state 110 is a state in which a function failure that fails to perform a normal operation and a clock that is out of a threshold value of a clock required in an exchange system or a board that is output are removed. The operator blocking state 120 is a state in which an operator blocks a corresponding internal clock unit by inputting a command to the operator computer 40. In other words, it is a state in which a problem occurs in hardware and the operator blocks, and in fact, a normal operation is performed in hardware, but an operator blocks a clock output by inputting a command for the purpose of testing. In the ready state, all the functions of the network synchronizer are performed, but only the output of the clock required inside the switching system is prohibited. In other words, the functional failure is eliminated by the reset, and the clock is output within the threshold required within the switching system, and the state naturally recovers to the normal state 100 after a time set during the manufacture of the hardware.
    Hereinafter, the transition process of such a state will be described. First, the process of the step S02 of transitioning from the normal state 100 to the function blocking state 110 occurs when the functional failure occurs or is reset, or when the internal clock part is dismounted. The process of the transition from the functional blocking state 110 to the ready state 130 (S03) transitions to the ready state 130 when the functional disorder is solved to generate a normal clock. In addition, when the clock is not normally output even in the ready state 130, the process transitions back to the function blocking state 110 through the process (S04). In addition, since the function blocking state 110 does not output a normal clock due to a functional failure, when the operator inputs a command, the function blocking state 110 may transition to the operator blocking state 120 through the process of (H05).
    There are two ways to transition from the ready state 130 to the normal state 100. First, when a normal clock is output for a set time in hardware, the internal clock unit stops the clock alarm itself and transitions to the normal state through the process of (S05). In this case, the process of the transition from the functional blocking state 130 to the normal state in the description of FIG. 2 is the same, and the time is also the same. Alternatively, the operator may enter a command to transition to the normal state 100 through the process of (H06). In the case of the ready state 130, since the clock is already outputting the clock within the threshold value required by the internal exchange system, even if the clock state is shifted to the normal state 100 by releasing the blocking of the clock output by the operator's command, no obstacle occurs. Therefore, there is an advantage that can transition from the ready state 130 to the normal state 100 in hardware or by the operator command through this process. In addition, since the process of the transition from the ready state 130 to the operator blocking state is already in the state that the output of the clock is blocked, it may be made to transition to the operator blocking state 120 through the process of (H04) by the operator command. In this way, the preparation state 130 allows the operator to know the state of the internal clock part accurately. That is, there is an advantage that it is possible to check whether the internal clock part is currently returning to the normal state 100 or the function blocking state 110 continuously.
    In the operator blocking state 120, the operator may enter an operator command into the operator computer 40 to transition to the normal state 100 through (H01) or to the ready state 130 through (H03). have. As such, when the state is changed to the normal state 100 or the ready state 130 by the operator command, if the state is not yet recovered from the function blocking state 110, the state transitions to the function blocking state 110. In this way, it is possible to accurately check the state of the internal clock unit in the switching system, and by allowing the operator to transition to any state except the function blocking state 110, the operator can more fully manage the internal clock unit. Will be.
    A process for confirming the above-described management state will be described with reference to FIGS. 1 and 3. When the operator inputs a command to check the states of the redundant first internal clock parts 11a and 11b and the second internal clock parts 13a and 13b of the network synchronizer device 10, the operator computer 40 may input the command. The command format is converted into a command format that can be processed by the switching system, and outputted to the maintenance control unit 30. The maintenance control unit 30 analyzes the received command, inspects the control unit to be actually processed, and outputs the command to the corresponding control unit according to the inspection result. At this time, since the input command is a command for checking the state of the internal clock unit of the synchronizer device 10, the command is input to the synchronizer device controller 20. The network synchronizer device control unit 20 is in a state of checking information on the clocks output from the first internal clock units 11a and 11b and the second internal clock units 13a and 13b which are duplicated at predetermined time intervals. Therefore, the state data of the clock unit in the network synchronizer device is output to the maintenance control unit 30. The maintenance control unit 30 then receives this, converts it into data that can be processed by the operator computer 40, and outputs it. Therefore, the operator computer 40 receives it and outputs it as a message that the operator can see on the screen. Illustrating the results output in this way can be illustrated as shown in Table 1 below.
    M6110 DISPLAY NET WORK SYNCHRONIZATION STATUSHOST GROUP MASTER = 1 GROUP 0 MASTER = 0 GROUP 1 MASTER-0 NSCGA-A NSCG-BNORM NORMNSCMA_NO STS LOCK_MD DAEW REF_TYPE REF_NO SLIP_CNT0 NORM NORM H'834f TRUNfRUN 1 01 H7 NO '7 Fcc 7' TRUNK 1 03 MBLK ---- ----- ---------- RESULT = OKCOMPLETED
    The first column of Table 1 indicates the command and network synchronization status of the device, the second column indicates that the operation mode in the device is a redundant first internal clock part, and the third column shows each redundant internal clock. Parts 11a, 11b, 13a, and 13b indicate that 11a and 13a are masters. The fourth and fifth columns indicate that each internal clock unit can be output in a normal state. In the fifth column, items of status information of each internal clock unit are shown. Here, 0 corresponds to 11a, 1 corresponds to 11b, 2 corresponds to 13a, and 3 corresponds to 13b. NORM is the normal state 100, REDY is the ready state 130, MBLK is the operator blocking state 120, FBLK is a function blocking state (110). In addition, the DACW is a phase of a clock output from each internal clock unit.
    In this way, the operator can accurately determine the state of the internal clock unit of the network synchronizer through the operator computer, and can properly cope with an emergency situation.
    As described above, there is an advantage in that the internal clock unit of the synchronizer device outputs the state information of the clock every predetermined time to the synchronizer device controller so that it can cope with the time change appropriately. In addition, since the state of the internal clock section is further divided, the operator not only has the advantage of effectively coping with the clock failure of the switching system, but also can freely control the transition to each state, so that an active countermeasure is possible even in an emergency. There is an advantage to losing.
    权利要求:
    Claims (3)
    [1" claim-type="Currently amended] In the state transition management device of the network synchronizer device of the switching system,
    An external clock unit which receives a clock output from the outside and divides the predetermined clock into a predetermined clock and outputs the internal clock unit of the switching system;
    Receives the output of the external clock portion and outputs the clock required by the switching system, and outputs a value within the threshold of the clock required by the switching system, and within the threshold of the clock required by the switching system. A function blocking state indicating a state that fails to output a value or is disengaged from the system, a malfunction, or a reset, and a value within a threshold value of the clock required by the switching system is output and performs all functions, but the output of the clock is prohibited. At least one internal clock unit having four states of a ready state and an operator blocking state in which output of a clock is prohibited by an operator command;
    A network synchronizer unit controlling the operation of the internal clock unit and receiving state information on the clock output of the internal clock unit in a predetermined time unit;
    A maintenance control unit for performing an interface of commands and data transmitted and received between an operator computer and the network synchronizer device control unit;
    A device for managing a network device in a switching system, comprising: an operator computer converting a command input from an operator into a command that can be processed in the switching system, and outputting a message output from the maintenance control unit by a number or a letter. .
    [2" claim-type="Currently amended] In the state transition method of the internal clock unit in the network unit device control unit having an internal clock unit for transition to the normal state, the functional blocking state, the operator blocking state, the ready state,
    The process of transitioning to the function blocking state by itself when a malfunction occurs, resets, or the board is disconnected in the normal state;
    Transitioning to an operator blocking state by an operator command to transition to the operator blocking state from the normal state;
    Transitioning to the operator blocking state by an operator command to transition from the function blocking state to the operator blocking state;
    When the operator command is received in the operator blocking state, a process for analyzing the received operator command and transitioning to the ready state is performed. and,
    Transition state to the normal state when an operator command to transition to the normal state from the ready state transitions to the normal state.
    [3" claim-type="Currently amended] The method of claim 2,
    Transitioning to the ready state by itself when the functional failure is eliminated without the operator's command in the function blocking state or when a clock within the threshold value required by the switching system is output;
    And a step of releasing a clock alarm by itself in the ready state to transition to the normal state.
    类似技术:
    公开号 | 公开日 | 专利标题
    US6363443B1|2002-03-26|Addressable shadow port and protocol for serial bus networks
    CN100449548C|2009-01-07|Method and system for synchronizing data base
    JP2532317B2|1996-09-11|Backup method of general-purpose I / O redundancy method in process control system
    US6988221B2|2006-01-17|Method and apparatus for processing control using a multiple redundant processor control system
    CA2173367C|1999-09-07|Protection switching apparatus and method
    CA1181512A|1985-01-22|Digital information switching system
    US6832347B1|2004-12-14|Clock synchronization and fault protection for a telecommunications device
    US5796935A|1998-08-18|Voting node for a distributed control system
    US5349654A|1994-09-20|Fault tolerant data exchange unit
    CN101595669B|2013-06-19|Method and device for exchanging information for facilitating synchronization of time network
    US5579511A|1996-11-26|Method and apparatus for checking the integrity of a complex computer installation used in the flight control of an aircraft
    EP1380952A1|2004-01-14|Fault-tolerant computer system, re-synchronization method thereof and re-synchronization program thereof
    US3602900A|1971-08-31|Synchronizing system for data processing equipment clocks
    US4704714A|1987-11-03|Method of detecting recovery from fault in a data transmission system which effects loopback control
    DE60200050T2|2004-09-16|Circuit for the detection of disturbances of the period in a clock signal
    US7328370B2|2008-02-05|Safety controller with simplified interface
    DE602004005642T2|2007-12-13|Safety control for the execution of standard and safety control programs
    KR100448709B1|2004-09-13|Data bus system and method for controlling the same
    EP1573543B1|2016-02-03|Inherently fail safe processing or control apparatus
    JP2537855B2|1996-09-25|Distributed digital communication system and its equipment
    US20040136487A1|2004-07-15|Digital reactor protection system for preventing common-mode failures
    KR100618275B1|2006-08-31|Synchronization of processor in a fault toferant multi-processor system
    JP2002517819A|2002-06-18|Method and apparatus for managing redundant computer-based systems for fault-tolerant computing
    US6216255B1|2001-04-10|Computer-aided logic circuit designing apparatus computer-aided logic circuit designing system, and computer-aided logic circuit designing method
    KR20040089624A|2004-10-21|Seamless clock
    同族专利:
    公开号 | 公开日
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1998-12-30|Application filed by 윤종용, 삼성전자 주식회사
    1998-12-30|Priority to KR1019980060896A
    2000-07-15|Publication of KR20000044399A
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019980060896A|KR20000044399A|1998-12-30|1998-12-30|Method for transitting statuses of network synchronization device in switching system|
    [返回顶部]